Publications

2026

  1. 1.

    Hybrid Vision Pipeline for Automated Thermal Gradient Shock Testing (TGST) Coating Assessment

    Jungwoo Ahn, Jaemin Jeong, Dongyi Seo, Jonathan Tsang, Jeong-Gun Lee, and Ji-Ho Cho

    23rd ACIVS (Advanced Concepts for Intelligent Vision Systems), 14–18 December 2026, Okinawa, Japan (to appear), 2026

    Conference: Dec 14, 2026 – Dec 18, 2026

    conference
  2. 2.

    Predicting Delay, Power, and Energy of Edge AI Inference with Ridge Regression

    Minkyu Park, Jaemin Jeong, Ji-Ho Cho, Jeong-Gun Lee

    IEEE International Conference on Consumer Electronics (ICCE), 2026

    Conference: Feb 3, 2026 – Feb 5, 2026

    conference

2025

  1. 1.

    A Comprehensive Labeling Protocol and Real-time Inference Framework for Road Hazard Detection

    Jaemin Jeong, Yunhee Woo, Dongyoung Kim, Jeongwoo An, Minkyu Park, Hakhyeon Kim, Seongwook Hong, Hongkwon Kim, Jihoon Park, Ji-Ho Cho, Jeong-Gun Lee

    IEEE International Conference on Consumer Electronics Asia (ICCE-Asia), 2025

    Conference: Oct 27, 2025 – Oct 29, 2025

    conferenceDOI
  2. 2.

    Edge형 GPU 시스템에서 딥러닝 모델의 성능 및 에너지 소모 특성 분석

    박민규, 김홍권, 정재민, 이정근

    정보처리학회 학술대회 (ASK), 2025

    Conference: May 29, 2025 – May 31, 2025

    conferenceLink

2024

  1. 1.

    Optimized Road Damage Detection Using Enhanced Deep Learning Architectures for Improved Inference Speed and Accuracy

    Jaemin Jeong, Jiho Cho, Jeong-Gun Lee

    IEEE International Conference on Big Data (BigData), 2024

    Conference: Dec 15, 2024 – Dec 18, 2024

    conferenceDOI
  2. 2.

    Separated and Independent Contrastive Learning on Labeled and Unlabeled Samples: Boosting Performance on Long-tail Semi-supervised Learning

    Dongyoung Kim, Wonsook Lee, Jeong-Gun Lee

    British Machine Vision Conference (BMVC), 2024

    Conference: Nov 25, 2024 – Nov 28, 2024

    conferenceLink
  3. 3.

    얼굴-표현-공격 검출을 위한 디포머블 합성곱 활용

    샤킬 무하마드 이브라힘, 샤킬 소하일 이브라힘, 슈자트 칸, 이정근

    대한전자공학회 추계 학술대회, 2024

    Conference: Nov 22, 2024 – Nov 23, 2024

    conference
  4. 4.

    오토 인코더와 대조 학습을 활용한 수면 단계 분류 예측 모델의 성능 개선

    오승훈, 김동영, 이정근

    정보처리학회 학술대회 (ASK), 2024

    Conference: May 23, 2024 – May 25, 2024

    conferenceLink
  5. 5.

    의사 깊이맵을 이용한 다중 디코더 기반의 고정밀 분할 딥러닝 모델 개발 및 효율적인 학습 전략

    김유진, 김동영, 이정근

    정보처리학회 학술대회 (ASK), 2024

    Conference: May 23, 2024 – May 25, 2024

    conferenceLink
  6. 6.

    Improved Generalization From Limiting Attention in a Transformer for Sleep Stage Classification

    Dongyoung Kim, Dongkyu Kim, Jeong-Gun Lee

    International Conference on Electronics, Information, and Communication (ICEIC), 2024

    Conference: Jan 28, 2024 – Jan 31, 2024

    conferenceDOI
  7. 7.

    Error-Resilient Inference With an Error-Aware Activation Function in a Deep Neural Network

    Jeong-Gun Lee, Dongyoung Kim

    International Conference on Electronics, Information, and Communication (ICEIC), 2024

    Conference: Jan 28, 2024 – Jan 31, 2024

    conferenceDOI

2023

  1. 1.

    Standardized Image-Based Polysomnography Database and Deep Learning Algorithm for Sleep Stage Classification

    Jaemin Jeong, Wonhyuck Yoon, Jeong-Gun Lee, Dongyoung Kim, Yunhee Woo, Dong-Kyu Kim, Hyun-Woo Shin

    ICCV Workshop on Computer Vision for Automated Medical Diagnosis, 2023

    Conference: Oct 2, 2023

    conferenceLink
  2. 2.

    실시간 수면 단계 분류를 위한 Single-epoch 모델 성능 평가

    오승훈, 김동영, 이정근

    통신정보 합동학술대회 (JCCI), 2023

    Conference: Apr 26, 2023 – Apr 28, 2023

    conferenceLink
  3. 3.

    노이즈 데이터가 포함된 감정 분류에서의 RNN기반 모델의 견고성 평가

    허태훈, 김동영, 이정근

    통신정보 합동학술대회 (JCCI), 2023

    Conference: Apr 26, 2023 – Apr 28, 2023

    conferenceLink

2022

  1. 1.

    Evaluation of OSA Patient Sleep Stage Classification Performance Using a Multi-Channel PSG Dataset

    Younghoon Na, Dongyoung Kim, Dong-Kyu Kim, Jeong-Gun Lee

    IEEE/IEE International Conference on Consumer Electronics Asia (ICCE-Asia), 2022

    Conference: Oct 26, 2022 – Oct 28, 2022

    conferenceDOI
  2. 2.

    Entropy-Based Model Generalization for Sleep Stage Classification

    Dongyoung Kim, Yunhee Woo, Younghoon Na, Jeong-Gun Lee, Dong-Kyu Kim

    International Conference on ICT Convergence (ICTC), 2022

    Conference: Oct 19, 2022 – Oct 21, 2022

    conferenceDOI

2021

  1. 1.

    Shaped Pruning for Efficient Memory Addressing in DNN Accelerators

    Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Jeong-Gun Lee

    IEEE/IEE International Conference on Consumer Electronics Asia (ICCE-Asia), 2021

    Conference: Nov 1, 2021 – Nov 3, 2021

    conferenceDOI
  2. 2.

    Sleep Stage Classification for Inter-institutional Transfer Learning

    Dongyoung Kim, Yunhee Woo, Jaemin Jeong, Dong-Kyu Kim, Jeong-Gun Lee

    International Conference on ICT Convergence (ICTC), 2021

    Conference: Oct 20, 2021 – Oct 22, 2021

    conferenceDOI
  3. 3.

    Image-based Sleep Stage Classification Model for Multi-Institutional Dataset

    Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Dong-Kyu Kim, Jeong-Gun Lee

    International Conference on ICT Convergence (ICTC), 2021

    Conference: Oct 20, 2021 – Oct 22, 2021

    conferenceDOI

2020

  1. 1.

    Zero-Keep Filter Pruning for Energy Efficient Deep Neural Network

    Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Youngwoong Ko, Jeong-Gun Lee

    International Conference on ICT Convergence (ICTC), 2020

    Conference: Oct 21, 2020 – Oct 23, 2020

    conferenceDOI
  2. 2.

    Filter Combination Learning for Convolutional Neural Network

    Jaemin Jeong, Dongyoung Kim, Yunhee Woo, Jeong-Gun Lee

    International Conference on ICT Convergence (ICTC), 2020

    Conference: Oct 21, 2020 – Oct 23, 2020

    conferenceDOI
  3. 3.

    딥러닝 CAM 기반 해석-가능한 영상 가시화 오픈소스 소프트웨어 도구 개발

    정재민, 함서은, 손주현, 이정근

    신호처리합동학술대회, 대한전자공학회, 2020

    conference

2019

  1. 1.

    Energy-Area-Efficient Approximate Multipliers for Error-Tolerant Applications on FPGAs

    Nguyen Van Toan, Jeong-Gun Lee

    IEEE International System-on-Chip Conference (SOCC), 2019

    Conference: Sep 3, 2019 – Sep 6, 2019

    conferenceDOI
  2. 2.

    효율적인 딥러닝 학습 위한 이미지 보강 설계공간 탐색

    정재민, 김동영, 우윤희, 이정근

    한국정보과학회·한국빅데이터학회 공동학술 심포지엄, 2019

    conference

2018

  1. 1.

    A GALS Design with Opposite-Phase Local Clock Assignment for Power Supply Noise Reduction

    Nguyen Van Toan, Minh-Tung Dam, Jeong-Gun Lee

    IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2018

    Conference: Oct 26, 2018 – Oct 30, 2018

    conferenceDOI
  2. 2.

    In-Situ Detector-Based AFS System on an FPGA

    Minh-Tung Dam, Nguyen Van Toan, Jeong-Gun Lee

    IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), 2018

    Conference: Apr 18, 2018 – Apr 20, 2018

    conference
  3. 3.

    딥-뉴럴 네트워크의 파라미터 최적화: MNIST 사례분석

    김민정, 임병준, 임승현, 정재민, 이종학, 이정근

    대한전자공학회 추계학술대회, 2018

    conference
  4. 4.

    A Design of an Error Prediction Circuit for Late Transitions Detection on an FPGA

    담민텅, 뉴엔반토안, 이정근

    한국정보과학회/한국빅데이터학회 공동학술 심포지엄, 2018

    conference

2017

  1. 1.

    A High-Resolution Supply Voltage Sensor Design and Its Performance Evaluations on an FPGA

    Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee

    한국정보과학회 학술발표논문집, pp. 103-105, 2017

    conference
  2. 2.

    Energy-Efficient and High Performance 2-Phase Asynchronous Micropipelines

    Nguyen Van Toan, Minh-Tung Dam, Jeong-Gun Lee

    IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2017

    Conference: Aug 6, 2017 – Aug 9, 2017

    conferenceDOI
  3. 3.

    Evaluation an EMI Reduction of a Multi-Frequency Clocking Circuit Utilizing Carry Chains on FPGAs

    Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee

    한국정보과학회 학술발표논문집, pp. 115-117, 2017

    conference
  4. 4.

    Exploring the Current Consumption of an Intel Edison Module for IoT Applications

    Minh-Tung Dam, Nguyen Van Toan, Jeong-Gun Lee

    IEEE International Instrumentation and Measurement Technology Conference (I2MTC), 2017

    Conference: May 22, 2017 – May 25, 2017

    conferenceDOI
  5. 5.

    A Globally Asynchronous Locally Synchronous Design with Clock Phase Modulation for Conducted EMI Reduction

    Nguyen Van Toan, Minh-Tung Dam, Jeong-Gun Lee

    International Conference on Electronics, Information, and Communication (ICEIC), 2017

    Conference: Jan 11, 2017 – Jan 14, 2017

    conference
  6. 6.

    Exploring the Impact of Multi-Frequency Clocking and GALS Design on Power Supply Noises

    Nguyen Van Toan, Minh-Tung Dam, Jeong-Gun Lee

    Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2017

    Conference: Jun 20, 2017 – Jun 23, 2017

    conferenceDOI

2016

  1. 1.

    The Impact of IO Supply Voltage Levels on Radiated EMI

    Minh-Tung Dam, Nguyen Van Toan, Jeong-Gun Lee

    Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2016

    Conference: May 17, 2016 – May 21, 2016

    conference
  2. 2.

    Design of a Multi-Frequency Clocking Circuit on an FPGA and Analysis of Its EMI Impact

    Nguyen Van Toan, Minh-Tung Dam, Jeong-Gun Lee

    Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2016

    Conference: May 17, 2016 – May 21, 2016

    conferenceDOI

2015

  1. 1.

    GPU기반 B-mode 초음파영상처리 구현시에 클럭주파수변이에 따른 성능/전력/에너지평가

    퐁티옌, 이정근

    대한전자공학회 하계종합학술대회, 2015

    Conference: Jun 21, 2015 – Jun 23, 2015

    conference
  2. 2.

    Impact of Optimization Strategies on Power and Energy Consumption on GPUs

    Thi Yen Phuong, Jeong-Gun Lee

    International Conference on Green and Human Information Technology (ICGHIT), 2015

    conference

2014

  1. 1.

    GPU-Based Real Time Ultrasound Beamformer

    Thi Yen Phuong, Jeong-Gun Lee

    GPU Technology Conference (GTC), 2014

    Conference: Mar 24, 2014 – Mar 27, 2014

    conference
  2. 2.

    OpenCL을 이용한 초음파 빔포밍 설계 및 CUDA 성능비교

    박하나, 이정근

    대한전자공학회 학술대회, pp. 1103-1106, 2014

    Conference: Jun 25, 2014 – Jun 27, 2014

    conference
  3. 3.

    Software Based Ultrasound B-mode/Beamforming Optimization on GPU and its Performance Prediction

    Thi Yen Phuong, Jeong-Gun Lee

    IEEE International Conference on High Performance Computing (HiPC), 2014

    Conference: Dec 17, 2014 – Dec 20, 2014

    conferenceDOI

2013

  1. 1.

    FPGA를 이용한 비동기식 회로 설계 방식의 저전압 동작 및 전자기파 방사 특성 실측

    오명훈, 박찬호, 김학영, 이정근

    대한전자공학회 하계종합학술대회, 2013

    Conference: Jul 3, 2013 – Jul 5, 2013

    conference

2012

  1. 1.

    Low Latency Scheduling on Multi BOOST Environment

    Byung Ki Kim, Jeong Gun Lee, Seon Woo Lee, Young Woong Ko

    International Conference on Hybrid Information Technology (ICHIT), 2012

    Conference: Aug 23, 2012 – Aug 25, 2012

    conferenceDOI
  2. 2.

    FPGA 장치 기반 Asynchronous MIPS 프로세서 설계

    이승준, 이정근, 곽상훈

    한국정보과학회/한국정보처리학회 공동 학술 심포지움, 2012

    conference
  3. 3.

    FPGA 기반의 GALS 네트워크-온-칩 아키텍쳐 설계

    곽상훈, 김강훈, 이정근

    한국정보과학회/한국정보처리학회 공동 학술 심포지움, 2012

    conference

2011

  1. 1.

    Monitoring and Feedback Tools for Realtime Workloads for Xen Virtual Machine

    Byung Ki Kim, Jae Hyeok Jang, Kyung Woo Hur, Jeong Gun Lee, Young Woong Ko

    International Conference on IT Convergence and Security (ICITCS), LNEE Vol.120, pp. 151-161, 2011

    conferenceDOI
  2. 2.

    A Novel Automated Experimental Approach for the Measurement of On-Chip Speed Variations through Dynamic Partial Reconfiguration

    Hasan Baig, Jeong-Gun Lee, Jeong-A Lee

    International Conference on Automation and Robotics (ICAR), LNEE Vol.123, pp. 281-290, 2011

    Conference: Dec 1, 2011 – Dec 2, 2011

    conferenceDOI
  3. 3.

    Low Area and High Speed SHA-1 Implementation

    Eun-Gu Jung, Daewan Han, Jeong-Gun Lee

    International SoC Design Conference (ISOCC), 2011

    Conference: Nov 17, 2011 – Nov 18, 2011

    conferenceDOI
  4. 4.

    An On-Node Intelligence based Energy Efficient ECG Monitoring System

    Min Zeng, Il-Yong Chung, Jeong-A Lee, Jeong-Gun Lee

    International Conference on ICT Convergence (ICTC), 2011

    Conference: Sep 28, 2011 – Sep 30, 2011

    conferenceDOI
  5. 5.

    Energy Efficient File Transfer Mechanism Using Deduplication Scheme

    Ho Min Jung, Sung Woon Kang, Jin Kim, Wan Yeon Lee, Jeong-Gun Lee, Young Woong Ko

    International Conference on Hybrid Information Technology (ICHIT), LNCS Vol.6935, pp. 421-428, 2011

    Conference: Sep 22, 2011 – Sep 24, 2011

    conferenceDOI
  6. 6.

    파일 유사도를 이용한 에너지 효율적인 파일 전송 기법

    정호민, 강성운, 이정근, 고영웅

    한국정보과학회 학술발표논문집, pp. 373-376, 2011

    conference
  7. 7.

    FPGA based Asynchronous FIFO Designs and Its Performance Analysis

    Seung-Joon Lee, Sang-Hoon Kwak, Jeong-Gun Lee

    International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2011

    Conference: Jun 19, 2011 – Jun 22, 2011

    conference
  8. 8.

    중복제거 TAR 기법을 적용한 백업 시스템

    강성운, 정호민, 이정근, 고영웅

    한국정보과학회 학술발표논문집, pp. 539-542, 2011

    conference
  9. 9.

    Xen 가상 머신에서 연성 실시간 스케줄러 구현

    허경우, 이정근, 고영웅

    한국정보기술학회 ICT 스마트기술 워크숍 및 하계종합학술대회, pp. 256-262, 2011

    conference
  10. 10.

    데이터 중복 제거 기반의 디스크 아카이브 시스템 설계 및 구현

    강성운, 정호민, 고영웅, 이정근

    한국정보처리학회 춘계 학술발표논문집, 2011

    conference
  11. 11.

    CRC64해시를 이용한 에너지 효율적인 파일 전송 기법 설계 및 구현

    정호민, 강성운, 이정근, 고영웅

    한국정보처리학회 춘계 학술발표논문집, 2011

    conference
  12. 12.

    Data Deduplication System for Supporting Multi-Mode

    Ho Min Jung, Won Vien Park, Wan Yeon Lee, Jeong Gun Lee, Young Woong Ko

    Asian Conference on Intelligent Information and Database Systems (ACIIDS), LNCS Vol.6591, pp. 78-87, 2011

    Conference: Apr 20, 2011 – Apr 22, 2011

    conferenceDOI
  13. 13.

    FPGA 장치 기반의 비동기식 회로설계 기법에 대한 분석

    이승준, 고영웅, 이덕영, 이정근

    대한전자공학회 하계 학술대회, 2011

    Conference: Jun 22, 2011 – Jun 24, 2011

    conference
  14. 14.

    비동기식 회로 설계 기술 동향

    오명훈, 이정근, 김성남, 김성운

    대한전자공학회 하계 학술대회, 2011

    Conference: Jun 22, 2011 – Jun 24, 2011

    conference

2009

  1. 1.

    Optimal Position Searching for Automated Malware Signature Extraction

    Yangseo Choi, Jintae Oh, Jeong-Gun Lee, Jaecheol Ryou

    IEEE International Symposium on Consumer Electronics (ISCE), 2009

    Conference: May 25, 2009 – May 28, 2009

    conferenceDOI
  2. 2.

    An Asymptotic Performance/Energy Analysis and Optimization of Multi-Core Architectures

    Jeong-Gun Lee, Eungu Jung, Wook Shin

    International Conference on Distributed Computing and Networking (ICDCN), LNCS, 2009

    Conference: Jan 3, 2009 – Jan 6, 2009

    conferenceDOI
  3. 3.

    Performance Evaluation of Code Optimization Strategies for ARM Processors

    Kwang-Won Choi, Ju-Teak Sun, Jeong-Gun Lee

    KIPS Fall Conference, 2009

    conference

2008

  1. 1.

    Asymptotic Performance Analysis and Optimization of Resource-Constrained Multi-Core Architectures

    Jeong-Gun Lee, Eungu Jung, Dong-Wook Lee

    IEEE International Conference on Microelectronics (ICM), 2008

    Conference: Dec 14, 2008 – Dec 17, 2008

    conferenceDOI
  2. 2.

    The Use of Fair Y-Sim for Optimizing Mapping Set Selection in Hardware/Software Co-Design

    Olufemi Adeluyi, Eunok Kim, Jeong-Gun Lee, Jeong-A Lee

    IEEE International SoC Design Conference (ISOCC), 2008

    Conference: Nov 24, 2008 – Nov 25, 2008

    conferenceDOI
  3. 3.

    Design of Heterogeneous Adders Based on Power-delay Tradeoffs

    Sanghoon Kwak, Dongsoo Har, Jeong-Gun Lee, Jeong-A Lee

    IEEE International Symposium on Embedded Computing (SEC), 2008

    Conference: Oct 6, 2008 – Oct 8, 2008

    conferenceDOI
  4. 4.

    Embedding High-Performance Synchronous Routers to Asynchronous Network on Chip

    Jeong-Gun Lee, Eungu Jung

    International Conference on Computer Design (CDES), 2008

    conference
  5. 5.

    CORDIC Based Off-line Vector Rotation Algorithm for High-Performance and Low-Power 3D Geometry Operations

    Eunok Kim, Jeong-Gun Lee, Jeong-A Lee

    Korea Computer Congress (KCC), 2008

    conference
  6. 6.

    Optimum Core Partitioning for High-Performance Multi-Core Processor Design

    Jeong-Gun Lee

    KISS Symposium, 2008

    conference

2007

  1. 1.

    A Design Method for Heterogeneous Adders

    Jeong-Gun Lee, Jeong-A Lee, Byeong-Seok Lee, Milos D. Ercegovac

    International Conference on Embedded Software and Systems (ICESS), LNCS, 2007

    Conference: May 14, 2007 – May 16, 2007

    conferenceDOI
  2. 2.

    Implications of Rent's Rule for NoC Design and Its Fault-Tolerance

    Dan Greenfield, Arnab Banerjee, Jeong-Gun Lee, Simon Moore

    IEEE Symposium on Networks-on-Chip (NoCS), 2007

    Conference: May 7, 2007 – May 9, 2007

    conferenceDOI

2006

  1. 1.

    Better Area-Time Tradeoffs in an Expanded Design Space of Adder Architecture by Parameterizing Bit-width of Various Carry Propagated Sub-adder-blocks

    Jeong-Gun Lee, Jeong-A Lee, Deok-Young Lee

    IEEE International Workshop on System on Chip (IWSOC), 2006

    Conference: Dec 27, 2006 – Dec 29, 2006

    conferenceDOI

2005

  1. 1.

    Implementation of Asynchronous Reorder Buffer for Asynchronous On-Chip Bus

    Eun-Gu Jung, Jeong-Gun Lee, Hamza Fraz, Kyoung-Son Jhang, Jeong-A Lee, Dong-Soo Har

    International Symposium on Signals, Circuits and Systems (ISSCS), 2005

    Conference: Jul 14, 2005 – Jul 15, 2005

    conferenceDOI
  2. 2.

    Reconfigurable Co-synthesis System Architecture

    Ji-han Park, Sang-Hoon Kwak, Jeong-Gun Lee, Jeong-A Lee, Dong-soo Har

    International Technical Conference of Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 445-446, 2005

    conference
  3. 3.

    High Performance Asynchronous On-Chip Bus with Multiple Issue and Out-of-Order/In-Order Completion

    Eun-Gu Jung, Jeong-Gun Lee, Sang-Hoon Kwak, Kyoung-Sun Jhang, Jeong-A Lee, Dong-Soo Har

    IEEE/ACM Great Lakes Symposium on VLSI (GLVLSI), 2005

    Conference: Apr 17, 2005 – Apr 19, 2005

    conferenceDOI

2004

  1. 1.

    Expanding Design Space of Adder Architecture for Better Time-Area Trade-offs

    Jeong-Gun Lee, Jeong-A Lee, Suk-Jin Kim, Kiseon Kim

    International System On Chip Conference (ISOCC), 2004

    conference
  2. 2.

    Design of a Mutated Adder and its Optimization Using ILP Formulation

    Jeong-Gun Lee, Jeong-A Lee, Suk-Jin Kim, Seong-Yong Ahn, Kiseon Kim

    EUROMICRO/DSD Work in Progress Session, 2004

    conference
  3. 3.

    Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization

    Jeong-Gun Lee, Euiseok Kim, Jeong-A Lee, Eunok Paek

    Asia-Pacific Computer Systems Architecture Conference (ACSAC), LNCS Vol.3189, pp. 582-595, 2004

    Conference: Sep 7, 2004 – Sep 9, 2004

    conferenceDOI
  4. 4.

    Two-Phase 1-of-N Delay Insensitive Handshake Protocol using Differential Value Encoding for SoC

    Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Sun Jhang, Dong-Soo Har

    International Scientific-Practical Conference on Communication (ISPC-COMM), 2004

    conference
  5. 5.

    Low Latency Asynchronous FIFO Design of Adopting Wave Pipelining for SoC Interconnection

    Jeong-Gun Lee, Suk-Jin Kim, Jeong-A Lee, Euiseok Kim, Kiseon Kim

    CNU IDEC SoC Workshop, pp. 49-53, 2004

    conference
  6. 6.

    A parallel flop synchronizer for asynchronous domains

    Suk-Jin Kim, Jeong-Gun Lee, Kiseon Kim

    IEEE Asia-Pacific Conference on Advanced System Integrated Circuits (AP-ASIC), 2004

    conferenceDOI
  7. 7.

    Handshake-Wave Combined Approach with Runtime Reconfiguration for Designing a Low Latency Asynchronous FIFO

    Jeong-Gun Lee, Suk-Jin Kim, Jeong-A Lee, Euiseok Kim, Kiseon Kim

    IEEE Asia-Pacific Conference on Advanced System Integrated Circuits (AP-ASIC), 2004

    conferenceDOI
  8. 8.

    Dynamic Clock Frequency Scaling in GALS on-chip Network Systems

    Suk-Jin Kim, Jeong-Gun Lee, Kiseon Kim

    International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2004

    conference
  9. 9.

    Differential Value Encoding for Two-Phase 1-of-N Delay Insensitive Handshake Protocol in GALS Systems

    Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Sun Jhang, Dong-Soo Har

    IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2004

    Conference: Jul 25, 2004 – Jul 28, 2004

    conferenceDOI
  10. 10.

    Two-Phase 1-of-N Delay Insensitive Handshake Protocol using Differential Value Encoding for System-on-Chip

    Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Sun Jhang, Dong-Soo Har

    Korea Communication Society Fall Conference, 2004

    conference

2003

  1. 1.

    Implementation of a Generalized Synchronous Variable Computation Time Arithmetic Unit with a Single-Dual-Single Wrapper

    Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya

    International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 1075-1078, 2003

    conference
  2. 2.

    Synthesis of a Single-Dual-Single Wrapper for a Generalized Synchronous Variable Computation Time Arithmetic Unit

    Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya

    International Workshop on Logic and Synthesis (IWLS), pp. 29-35, 2003

    Conference: May 28, 2003 – May 30, 2003

    conference
  3. 3.

    Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units

    Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya

    IEEE/ACM Design, Automation and Test in Europe (DATE), pp. 276-281, 2003

    Conference: Mar 3, 2003 – Mar 7, 2003

    conferenceDOI
  4. 4.

    Performance Optimization of Synchronous Control Units for Datapaths with Variable Delay Arithmetic Units

    Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya

    IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 261-266, 2003

    Conference: Jan 21, 2003 – Jan 24, 2003

    conferenceDOI
  5. 5.

    Two-Phase 1-of-N Data Encoding for GALS

    Eun-Gu Jung, Jeong-Gun Lee, Dong-Ik Lee

    Korea SoC Design Conference, 2003

    conference

2002

  1. 1.

    A Simulator for Performance Evaluation of Asynchronous Systems

    Sang-Ik Choi, Jeong-Gun Lee, Dong-Ik Lee, Seok-Hwan Yoon

    International Conference on VLSI (VLSI'02), pp. 66-71, 2002

    conference
  2. 2.

    Deriving an Optimized Synchronous Control Unit for a Variable Delay Datapath

    Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

    IDEC Summer Conference, pp. 143-146, 2002

    conference
  3. 3.

    Dynamic Clock Frequency Scaling in Globally Asynchronous and Locally Synchronous Systems

    Suk-Jin Kim, Jeong-Gun Lee, Dong-Ik Lee

    Asia-Pacific System on a Chip Conference (APSOC), pp. 114-119, 2002

    conference
  4. 4.

    Implementation of Distributed Synchronous Control Units for Maximizing Utilization Ratio of Variable Computation Time Arithmetic

    Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

    Korea SoC Design Conference, 2002

    conference
  5. 5.

    Buffer Allocation Optimization for Asynchronous Linear Pipelines using Performance Evaluation and Simulation Annealing

    Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

    Korea SoC Design Conference, 2002

    conference
  6. 6.

    Synthesis of Asynchronous Circuits from C Language Using Syntax Directed Translation

    Sang-Hoon Kwak, Jeong-Gun Lee, Dong-Ik Lee

    IEEK Summer Conference, pp. 353-356, 2002

    conference
  7. 7.

    Design of a Synchronous Control Unit for a Datapath with Variable Delay Arithmetic Units

    Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

    IEEK Summer Conference, pp. 321-324, 2002

    conference
  8. 8.

    Asynchronous Linear Pipeline Dynamics and Its Application to Efficient Buffer Allocation Algorithm

    Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

    IEEK Summer Conference, pp. 109-112, 2002

    conference

2001

  1. 1.

    Building a Distributed Asynchronous Control Unit Through Automatic Derivation of Hierarchically Decomposed AFSMs from a CDFG

    Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

    IEEE Conference on Advanced Research in VLSI (ARVLSI), pp. 2-15, 2001

    conferenceDOI
  2. 2.

    Imprecise Data Computation for High Performance Asynchronous Processors

    Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

    IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 261-266, 2001

    Conference: Jan 30, 2001 – Feb 2, 2001

    conferenceDOI

2000

  1. 1.

    Automatic Distributed Asynchronous Control Circuit Generation From Data Flow Graph for Asynchronous High-Level Synthesis

    Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

    IEEE International Symposium on Circuits and Systems (ISCAS), pp. II-49-II-52, 2000

    Conference: May 28, 2000 – May 31, 2000

    conferenceDOI
  2. 2.

    Imprecise Data Computation for High Performance Asynchronous Processors

    Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

    KISS Computer System Group Fall Conference, pp. 88-93, 2000

    conference
  3. 3.

    Pragmatic Reachability Analysis of Bounded Petri Nets on Unfoldings

    Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

    Formal Method Workshop, pp. 165-171, 2000

    conference
  4. 4.

    Automatic Control Circuit Generation from Data Flow Graph for Asynchronous High-Level Synthesis

    Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

    IDEC Conference, pp. 61-64, 2000

    conference
  5. 5.

    Automatic Process-Oriented Control Circuit Generation For Asynchronous High-Level Synthesis

    Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

    IEEE International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC), pp. 104-113, 2000

    conferenceDOI
  6. 6.

    Back Carry Collapsing Adder Design for High-Performance Asynchronous System

    Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

    IDEC Conference, pp. 95-98, 2000

    conference

1999

  1. 1.

    Testing for Speed-Independent Asynchronous Circuits Using the Self-Checking Property

    Eunjung Oh, Jeong-Gun Lee, Dong-Ik Lee, Ho-Yong Choi

    IEEK Fall Conference, pp. 384-387, 1999

    conference
  2. 2.

    High Level Simulation of Asynchronous Circuit on Parallel Processing Environment

    Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

    IEEK CAD & VLSI Design Conference, pp. 72-77, 1999

    conference

1998

  1. 1.

    Asynchronous Circuit Initialization Using BDD

    Soo-Hyun Kim, Jeong-Gun Lee, Dong-Ik Lee

    IEEK Summer Conference, pp. 887-890, 1998

    conference

1997

  1. 1.

    Implementability Checking and Basic Gate Synthesis of Speed-Independent Circuits Using BDD

    Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

    Formal Method Workshop, pp. 44-54, 1997

    conference
  2. 2.

    Basic Gate Level Logic Synthesis of Speed-Independent Circuit using Binary Decision Diagram

    Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

    IEEK Fall Conference, pp. 1136-1139, 1997

    conference