Publications

Hybrid Vision Pipeline for Automated Thermal Gradient Shock Testing (TGST) Coating Assessment

Jungwoo Ahn, Jaemin Jeong, Dongyi Seo, Jonathan Tsang, Jeong-Gun Lee, and Ji-Ho Cho

23rd ACIVS (Advanced Concepts for Intelligent Vision Systems), 14–18 December 2026, Okinawa, Japan (to appear), 2026

Conference: Dec 14, 2026 – Dec 18, 2026

Deep Learning Mimicking Human Visual Scoring for Sleep Stage Classification

Jaemin Jeong

PhD Dissertation, Hallym University, 2026

PSG-Free Multi-View Facial Imaging and Attention-Based Fusion for OSA Severity Classification

Dongyoung Kim, Yunhee Woo, Jihoon Park, Jaemin Jeong, Seunghun Oh, Young-Woong Ko, Il-Hwan Lee, Dong-Kyu Kim, Jeong-Gun Lee

Expert Systems With Applications, vol. 316, 2026

Published: Jun 2026

PoseDefCycleGAN: Identity-Preserving Face Frontalization with Deformable Convolutions and Pose-Aware Supervision

Shakeel Muhammad Ibrahim, Shujaat Khan, Young-Woong Ko, Jeong-Gun Lee

Knowledge-Based Systems, vol. 337, 2026

Published: Mar 2026

Predicting Delay, Power, and Energy of Edge AI Inference with Ridge Regression

Minkyu Park, Jaemin Jeong, Ji-Ho Cho, Jeong-Gun Lee

IEEE International Conference on Consumer Electronics (ICCE), 2026

Conference: Feb 3, 2026 – Feb 5, 2026

A Comprehensive Labeling Protocol and Real-time Inference Framework for Road Hazard Detection

Jaemin Jeong, Yunhee Woo, Dongyoung Kim, Jeongwoo An, Minkyu Park, Hakhyeon Kim, Seongwook Hong, Hongkwon Kim, Jihoon Park, Ji-Ho Cho, Jeong-Gun Lee

IEEE International Conference on Consumer Electronics Asia (ICCE-Asia), 2025

Conference: Oct 27, 2025 – Oct 29, 2025

CAT: Class-aware adaptive-thresholding for robust semi-supervised domain generalization

Sumaiya Zoha, Jeong-Gun Lee, Young-Woong Ko

PLOS ONE, vol. Vol.20, No.9, 2025

Published: Sep 4, 2025

Separated and Independent Contrastive Semi-Supervised Learning for Imbalanced Datasets

Dongyoung Kim, Won-Sook Lee, Young-Woong Ko, Jeong-Gun Lee

IEEE Access, 2025

Published: Jun 18, 2025

Edge형 GPU 시스템에서 딥러닝 모델의 성능 및 에너지 소모 특성 분석

박민규, 김홍권, 정재민, 이정근

정보처리학회 학술대회 (ASK), 2025

Conference: May 29, 2025 – May 31, 2025

Improving Face Presentation Attack Detection Through Deformable Convolution and Transfer Learning

Shakeel Muhammad Ibrahim, Muhammad Sohail Ibrahim, Shujaat Khan, Young-Woong Ko, Jeong-Gun Lee

IEEE Access, 2025

Published: Feb 13, 2025

Deep Learning Approach to Clinical Decision Support System in Sleep Stage Classification

Dong-Young Kim

PhD Dissertation, Hallym University, 2025

Face Recognition and Reconstruction for Computer Security and Access Control

Shakeel M. Ibrahim

Master Thesis, Hallym University, 2025

Optimized Road Damage Detection Using Enhanced Deep Learning Architectures for Improved Inference Speed and Accuracy

Jaemin Jeong, Jiho Cho, Jeong-Gun Lee

IEEE International Conference on Big Data (BigData), 2024

Conference: Dec 15, 2024 – Dec 18, 2024

얼굴-표현-공격 검출을 위한 디포머블 합성곱 활용

샤킬 무하마드 이브라힘, 샤킬 소하일 이브라힘, 슈자트 칸, 이정근

대한전자공학회 추계 학술대회, 2024

Conference: Nov 22, 2024 – Nov 23, 2024

Separated and Independent Contrastive Learning on Labeled and Unlabeled Samples: Boosting Performance on Long-tail Semi-supervised Learning

Dongyoung Kim, Wonsook Lee, Jeong-Gun Lee

British Machine Vision Conference (BMVC), 2024

Conference: Nov 25, 2024 – Nov 28, 2024

의사 깊이맵을 이용한 다중 디코더 기반의 고정밀 분할 딥러닝 모델 개발 및 효율적인 학습 전략

김유진, 김동영, 이정근

정보처리학회 학술대회 (ASK), 2024

Conference: May 23, 2024 – May 25, 2024

오토 인코더와 대조 학습을 활용한 수면 단계 분류 예측 모델의 성능 개선

오승훈, 김동영, 이정근

정보처리학회 학술대회 (ASK), 2024

Conference: May 23, 2024 – May 25, 2024

Error-Resilient Inference With an Error-Aware Activation Function in a Deep Neural Network

Jeong-Gun Lee, Dongyoung Kim

International Conference on Electronics, Information, and Communication (ICEIC), 2024

Conference: Jan 28, 2024 – Jan 31, 2024

Improved Generalization From Limiting Attention in a Transformer for Sleep Stage Classification

Dongyoung Kim, Dongkyu Kim, Jeong-Gun Lee

International Conference on Electronics, Information, and Communication (ICEIC), 2024

Conference: Jan 28, 2024 – Jan 31, 2024

Analysis of Transformer's Attention Behavior in Sleep Stage Classification and Limiting it to Improve Performance

Dongyoung Kim, Youngwoong Ko, Dong-Kyu Kim, Jeong-Gun Lee

IEEE Access, 2024

Domain generalization for semantic segmentation: a survey

Taki Hasan Rafi, Ratul Mahjabin, Emon Ghosh, Young-Woong Ko, Jeong-Gun Lee

Artificial Intelligence Review, vol. Vol.57, 2024

Published: Aug 12, 2024

Standardized Image-Based Polysomnography Database and Deep Learning Algorithm for Sleep Stage Classification

Jaemin Jeong, Wonhyuck Yoon, Jeong-Gun Lee, Dongyoung Kim, Yunhee Woo, Dong-Kyu Kim, Hyun-Woo Shin

ICCV Workshop on Computer Vision for Automated Medical Diagnosis, 2023

Conference: Oct 2, 2023

Standardized image-based polysomnography database and deep learning algorithm for sleep-stage classification

Jaemin Jeong, Wonhyuck Yoon, Jeong-Gun Lee, Dongyoung Kim, Yunhee Woo, Dong-Kyu Kim, Hyun-Woo Shin

Sleep, 2023

Published: Dec 11, 2023 · Online: Sep 13, 2023

인공지능 모델의 파라미터 저장을 위한 필터 조합 학습 네트워크 시스템의 제어 방법, 장치 및 프로그램

Inventors not provided

KR Patent No. 10-2544220 (registered 2023-06-12), 2023

Automatic Sleep Stage Classification Using Deep Learning Algorithm for Multi-institutional Database

Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Wonsook Lee, Jeong-Gun Lee, Dong-Kyu Kim

IEEE Access, vol. Vol.11, pp. 46297-46307, 2023

다채널의 생체 신호들을 포함하는 이미지를 기반으로 수면 단계를 분류하는 전자 장치, 및 수면 단계 분류 방법

Inventors not provided

KR Patent No. 10-2526181 (registered 2023-04-21), 2023

노이즈 데이터가 포함된 감정 분류에서의 RNN기반 모델의 견고성 평가

허태훈, 김동영, 이정근

통신정보 합동학술대회 (JCCI), 2023

Conference: Apr 26, 2023 – Apr 28, 2023

실시간 수면 단계 분류를 위한 Single-epoch 모델 성능 평가

오승훈, 김동영, 이정근

통신정보 합동학술대회 (JCCI), 2023

Conference: Apr 26, 2023 – Apr 28, 2023

기계학습모델 공유 또는 판매를 위한 시스템 및 시스템의 동작 방법

Inventors not provided

KR Patent No. 10-2453673 (registered 2022-10-06), 2022

Evaluation of OSA Patient Sleep Stage Classification Performance Using a Multi-Channel PSG Dataset

Younghoon Na, Dongyoung Kim, Dong-Kyu Kim, Jeong-Gun Lee

IEEE/IEE International Conference on Consumer Electronics Asia (ICCE-Asia), 2022

Conference: Oct 26, 2022 – Oct 28, 2022

Entropy-Based Model Generalization for Sleep Stage Classification

Dongyoung Kim, Yunhee Woo, Younghoon Na, Jeong-Gun Lee, Dong-Kyu Kim

International Conference on ICT Convergence (ICTC), 2022

Conference: Oct 19, 2022 – Oct 21, 2022

인공지능 모델의 필터 변환을 위한 전자 장치의 제어 방법 및 프로그램

Inventors not provided

KR Patent No. 10-2429804 (registered 2022-08-02), 2022

Deep learning application to clinical decision support system in sleep stage classification

Dongyoung Kim, Jeong-Gun Lee, Yunhee Woo, Jaemin Jeong, Chulho Kim, Dong-Kyu Kim

Journal of Personalized Medicine, 2022

Published: Jan 20, 2022

A study on performance optimization of sleep stage classification deep learning model using imaged biosignal data

Yunhee Woo

PhD Dissertation, Hallym University, 2022

Shaped Pruning for Efficient Memory Addressing in DNN Accelerators

Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Jeong-Gun Lee

IEEE/IEE International Conference on Consumer Electronics Asia (ICCE-Asia), 2021

Conference: Nov 1, 2021 – Nov 3, 2021

Sleep Stage Classification for Inter-institutional Transfer Learning

Dongyoung Kim, Yunhee Woo, Jaemin Jeong, Dong-Kyu Kim, Jeong-Gun Lee

International Conference on ICT Convergence (ICTC), 2021

Conference: Oct 20, 2021 – Oct 22, 2021

Image-based Sleep Stage Classification Model for Multi-Institutional Dataset

Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Dong-Kyu Kim, Jeong-Gun Lee

International Conference on ICT Convergence (ICTC), 2021

Conference: Oct 20, 2021 – Oct 22, 2021

Filter Combination Learning for Convolutional Neural Network

Jaemin Jeong, Ji-Ho Cho, Jeong-Gun Lee

ICT Express, vol. Vol.7, Issue 1, 2021

Published: Mar 2021

FPGA 내부 고속 캐리 체인 회로를 이용한 다중-주파수 클록 회로 설계 및 Tradeoff 분석

이정근, 이덕영

한국정보기술학회 논문지, vol. Vol.19, No.1, pp. 71-78, 2021

Published: Jan 31, 2021

Zero-Keep Filter Pruning for Energy/Power Efficient Deep Neural Networks

Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Young-Woong Ko, Jeong-Gun Lee

Electronics, vol. Vol.10, No.11, pp. 1238, 2021

Published: May 22, 2021

FPGA-based Multi-Level Approximate Multipliers for High-Performance Error-Resilient Applications

Nguyen Van Toan, Jeong-Gun Lee

IEEE Access, vol. Vol.8, 2020

Published: Feb 3, 2020

Zero-Keep Filter Pruning for Energy Efficient Deep Neural Network

Yunhee Woo, Dongyoung Kim, Jaemin Jeong, Youngwoong Ko, Jeong-Gun Lee

International Conference on ICT Convergence (ICTC), 2020

Conference: Oct 21, 2020 – Oct 23, 2020

Filter Combination Learning for Convolutional Neural Network

Jaemin Jeong, Dongyoung Kim, Yunhee Woo, Jeong-Gun Lee

International Conference on ICT Convergence (ICTC), 2020

Conference: Oct 21, 2020 – Oct 23, 2020

딥러닝 CAM 기반 해석-가능한 영상 가시화 오픈소스 소프트웨어 도구 개발

정재민, 함서은, 손주현, 이정근

신호처리합동학술대회, 대한전자공학회, 2020

In-Situ Timing Detector Based Two Cycles Adaptive Frequency Scaling System on FPGAs

Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee

Journal of Circuits, Systems, and Computers, vol. Vol.29, No.6, 2020

Published: May 2020 · Online: Aug 19, 2019

An One-Cycle Correction Error-Resilient Flip-Flop for Variation-Tolerant Designs on an FPGA

Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee

Electronics, vol. Vol.9, pp. 633, 2020

Published: Apr 10, 2020

수면 단계 분류 자동화를 위한 딥러닝 모델 연구 (A Study on Deep Learning Models for Automatic Sleep Stage Classification)

Dong-Young Kim

Master Thesis, Hallym University, 2020

FCL-Net: 온디바이스를 위한 필터 조합 학습 네트워크 (FCL-Net: Filter Combination Learning Network for on-devices)

Jaemin Jeong

Master Thesis, Hallym University, 2020

Energy-Area-Efficient Approximate Multipliers for Error-Tolerant Applications on FPGAs

Nguyen Van Toan, Jeong-Gun Lee

IEEE International System-on-Chip Conference (SOCC), 2019

Conference: Sep 3, 2019 – Sep 6, 2019

Immunity Characterization of I/O Supply Voltage Scaled and Fault Tolerant Circuits against EMI

Nguyen Van Toan, Dam Minh Tung, Jungmin So, Jeong-Gun Lee

Advances in Electrical and Computer Engineering, 2019

Published: May 31, 2019

A High-Resolution and Glitch-Free All-Digital Variable Length Ring Oscillator Design on an FPGA

Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee

Computers & Electrical Engineering, vol. Vol.74, pp. 149-163, 2019

Published: Mar 2019

EM Emanation Exploration in FPGA-based Digital Design

Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee

Journal of Central South University, vol. Vol.26, Issue 1, pp. 158-167, 2019

Published: Jan 2019 · Online: Jan 25, 2019

A Carry Chain Based ADMFC Design on an FPGA for EMI Reduction and Noise Compensation

Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee

Journal of Circuits, Systems, and Computers, vol. Vol.28, Issue 1, 2019

Published: Jan 2019 · Online: Oct 15, 2018

효율적인 딥러닝 학습 위한 이미지 보강 설계공간 탐색

정재민, 김동영, 우윤희, 이정근

한국정보과학회·한국빅데이터학회 공동학술 심포지엄, 2019

G-DCF: Improving System Spectral Efficiency through Concurrent Transmissions in Wireless LANs

Ayinebyona Eliab, Yonghwi Kim, Joosang Lee, Jeong-Gun Lee, Jungmin So

Wireless Communications and Mobile Computing, 2019

Published: Sep 11, 2019

A GALS Design Based on Multi-Frequency Clocking for Digital Switching Noise Reductions

Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee

Integration, the VLSI Journal, 2019

Published: Nov 2019

헬스테인먼트 운영관리 시스템 및 그 방법

Inventors not provided

KR Patent No. 10-2017-0010599 (registered 2018-11), 2018

A GALS Design with Opposite-Phase Local Clock Assignment for Power Supply Noise Reduction

Nguyen Van Toan, Minh-Tung Dam, Jeong-Gun Lee

IEEE Asia Pacific Conference on Circuits and Systems (APCCAS), 2018

Conference: Oct 26, 2018 – Oct 30, 2018

Analysis of Clock Scheduling in Frequency Domain for Digital Switching Noise Suppressions

Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee

IEEE Transactions on Very Large Scale Integration (VLSI) Systems, vol. Vol.26, Issue 9, pp. 1685-1698, 2018

Published: Sep 2018

In-Situ Detector-Based AFS System on an FPGA

Minh-Tung Dam, Nguyen Van Toan, Jeong-Gun Lee

IEEE Symposium on Low-Power and High-Speed Chips (COOL Chips), 2018

Conference: Apr 18, 2018 – Apr 20, 2018

Measurements of Metastability in MUTEX on an FPGA

Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee

IEICE Electronics Express, vol. Vol.15, No.1, pp. 1-11, 2018

Online: Dec 13, 2017

A Carry Chain Based All-Digital MFC and All-Digital VLRO Designs on an FPGA

Dam Minh Tung

PhD Dissertation, Hallym University, 2018

A Design of an Error Prediction Circuit for Late Transitions Detection on an FPGA

담민텅, 뉴엔반토안, 이정근

한국정보과학회/한국빅데이터학회 공동학술 심포지엄, 2018

딥-뉴럴 네트워크의 파라미터 최적화: MNIST 사례분석

김민정, 임병준, 임승현, 정재민, 이종학, 이정근

대한전자공학회 추계학술대회, 2018

Analysis and Design of a Digital Switching Noise Suppression Technique based on Multi-Phase Clocking in SoCs

Nguyen Van Toan

PhD Dissertation, Hallym University, 2018

실시간 응용을 위한 혼합형 다중 객체 추적 시스템의 구현

우윤희, 최권택, 이정근

한국정보기술학회 논문지, vol. 17권 11호, 2018

Published: Nov 30, 2019

Exploring the Impacts of Optimization Strategies on Performance, Power/Energy Consumption of a GPU based Parallel Reduction

Thi Yen Phuong, Deok-Young Lee, Jeong-Gun Lee

Journal of Central South University, vol. Vol.24, Issue 11, pp. 2624-2637, 2017

Published: Nov 2017 · Online: Dec 16, 2017

Evaluation an EMI Reduction of a Multi-Frequency Clocking Circuit Utilizing Carry Chains on FPGAs

Dam Minh Tung, Nguyen Van Toan, Jeong-Gun Lee

한국정보과학회 학술발표논문집, pp. 115-117, 2017

A High-Resolution Supply Voltage Sensor Design and Its Performance Evaluations on an FPGA

Nguyen Van Toan, Dam Minh Tung, Jeong-Gun Lee

한국정보과학회 학술발표논문집, pp. 103-105, 2017

Energy-Efficient and High Performance 2-Phase Asynchronous Micropipelines

Nguyen Van Toan, Minh-Tung Dam, Jeong-Gun Lee

IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2017

Conference: Aug 6, 2017 – Aug 9, 2017

Exploring the Current Consumption of an Intel Edison Module for IoT Applications

Minh-Tung Dam, Nguyen Van Toan, Jeong-Gun Lee

IEEE International Instrumentation and Measurement Technology Conference (I2MTC), 2017

Conference: May 22, 2017 – May 25, 2017

Design of a Clockless MSP430 Core Using Mixed Asynchronous Design Flow

Ziho Shin, Myeong-Hoon Oh, Jeong-Gun Lee, Hag Young Kim, Young Woo Kim

IEICE Electronics Express, 2017

Published: Apr 25, 2017 · Online: Mar 31, 2017

A Performance, Power and Energy Analysis of Ultrasound B-Mode Imaging on a GPU with VFS

Thi Yen Phuong, Deok-Young Lee, Jeong-Gun Lee

Concurrency and Computation: Practice and Experience, vol. Vol.29, Issue 5, 2017

Published: Mar 10, 2017 · Online: Nov 4, 2016

A Globally Asynchronous Locally Synchronous Design with Clock Phase Modulation for Conducted EMI Reduction

Nguyen Van Toan, Minh-Tung Dam, Jeong-Gun Lee

International Conference on Electronics, Information, and Communication (ICEIC), 2017

Conference: Jan 11, 2017 – Jan 14, 2017

Exploring the Impact of Multi-Frequency Clocking and GALS Design on Power Supply Noises

Nguyen Van Toan, Minh-Tung Dam, Jeong-Gun Lee

Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2017

Conference: Jun 20, 2017 – Jun 23, 2017

디지털 FPGA 칩의 전자파 방출에 대한 설계공간탐색 및 분석

이덕영, 이정근

한국정보기술학회 논문지, vol. 14권 8호, 2016

Published: Aug 31, 2016

A Performance-Aware Yield Analysis and Optimization of Manycore Architectures

Jeong-Gun Lee, Sanghoon Kwak

Computers & Electrical Engineering, vol. Vol.54, pp. 40-52, 2016

Published: Aug 2016

Design of a Multi-Frequency Clocking Circuit on an FPGA and Analysis of Its EMI Impact

Nguyen Van Toan, Minh-Tung Dam, Jeong-Gun Lee

Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2016

Conference: May 17, 2016 – May 21, 2016

The Impact of IO Supply Voltage Levels on Radiated EMI

Minh-Tung Dam, Nguyen Van Toan, Jeong-Gun Lee

Asia-Pacific International Symposium on Electromagnetic Compatibility (APEMC), 2016

Conference: May 17, 2016 – May 21, 2016

다중 주파수 클럭을 가지는 파이프라인 회로 장치

Inventors not provided

KR Patent No. 10-1621761 (registered 2016-05-11), 2016

비동기 클럭을 가지는 파이프라인 회로 장치

Inventors not provided

KR Patent No. 10-1621760 (registered 2016-05-11), 2016

GPU기반 B-mode 초음파영상처리 구현시에 클럭주파수변이에 따른 성능/전력/에너지평가

퐁티옌, 이정근

대한전자공학회 하계종합학술대회, 2015

Conference: Jun 21, 2015 – Jun 23, 2015

Design Space Exploration of SW Beamformer on GPU

Thi Yen Phuong, Jeong-Gun Lee

Concurrency and Computation: Practice and Experience, vol. Vol.27, Issue 7, pp. 1718-1733, 2015

Published: May 2015 · Online: Jul 7, 2014

Zero latency synchronization scheme using prediction and avoidance of synchronization failure in heterochronous clock domains

Sung-Gun Song, Myeong-Hoon Oh, Jeong-Gun Lee, Sung-Mo Park

Journal of Semiconductor Technology and Science, vol. Vol.15, No.2, 2015

Published: Apr 30, 2015

Impact of Optimization Strategies on Power and Energy Consumption on GPUs

Thi Yen Phuong, Jeong-Gun Lee

International Conference on Green and Human Information Technology (ICGHIT), 2015

A Low EMI Circuit Design with Asynchronous Multi-Frequency Clocking

Jeong-Gun Lee

IEICE Transactions on Electronics, vol. Vol.E97-C, No.12, pp. 1158-1161, 2014

Published: Dec 1, 2014

Asynchronous Circuit Designs on an FPGA for Targeting a Power/Energy Efficient SoC

Jeong-Gun Lee, Myeong-Hoon Oh

IEICE Transactions on Electronics, 2014

Published: Apr 1, 2014

GPU-Based Real Time Ultrasound Beamformer

Thi Yen Phuong, Jeong-Gun Lee

GPU Technology Conference (GTC), 2014

Conference: Mar 24, 2014 – Mar 27, 2014

Power Consumption and Energy Efficiency Performance Evaluation of GPU for Beamforming in Medical Image Processing

Rafael

Master Thesis, Hallym University, 2014

Ultrasound Beamforming Design Using OpenCL and Its Performance Evaluation and Comparison on Multiple Manycore Platforms

Hana Park

Master Thesis, Hallym University, 2014

Design Space Exploration of a SW Beamformer on GPUs and Its Performance Prediction

Phung Thi Yen

Master Thesis, Hallym University, 2014

Software Based Ultrasound B-mode/Beamforming Optimization on GPU and its Performance Prediction

Thi Yen Phuong, Jeong-Gun Lee

IEEE International Conference on High Performance Computing (HiPC), 2014

Conference: Dec 17, 2014 – Dec 20, 2014

비동기식 프로세서 설계 기법을 통한 저전압 동작 특성 분석과 전자기파 방사량 측정 분석

오명훈, 김학영, 이정근

한국정보기술학회논문지, vol. 제12권 제2호, 2014

Published: Feb 2014

Deduplication TAR Scheme Using User-Level File System

Young Woong Ko, Min-Ja Kim, Jeong-Gun Lee, Chuck Yoo

IEICE Transactions on Information and Systems, vol. 97-D(8), pp. 2174-2177, 2014

Published: Aug 2014 · Online: Aug 5, 2014

OpenCL을 이용한 초음파 빔포밍 설계 및 CUDA 성능비교

박하나, 이정근

대한전자공학회 학술대회, pp. 1103-1106, 2014

Conference: Jun 25, 2014 – Jun 27, 2014

Self-Checking Look-up Tables using Scalable Error Detection Coding (SEDC) Scheme

Jeong-A Lee, Zahid Ali Siddiqui, Natarajan Somasundaram, Jeong-Gun Lee

Journal of Semiconductor Technology and Science, vol. Vol.13, No.5, 2013

Published: Oct 31, 2013

FPGA를 이용한 비동기식 회로 설계 방식의 저전압 동작 및 전자기파 방사 특성 실측

오명훈, 박찬호, 김학영, 이정근

대한전자공학회 하계종합학술대회, 2013

Conference: Jul 3, 2013 – Jul 5, 2013

확장형 오류검출코드 생성기, 그 생성기를 구비한 자가검사 룩업테이블 및 확장형 오류검출코드 생성방법

이정아; 소마순다람, 나타르잔; 이정근

KR Patent No. 10-1267894-0000 (registered 2013-05-21), 2013

비동기식 순차 및 병행 제어 회로의 직접 합성 규칙

박하나, 이정근

한국정보기술학회논문지, vol. 제11권 제8호, pp. 1-8, 2013

Published: Aug 2013

Asynchronous Circuit Design on an FPGA: MIPS Processor Case Study

Seung-Joon Lee, Deok-Young Lee, Young Woong Ko, Jeong-Gun Lee

Communications in Computer and Information Science, Springer, 2012

Low Latency Scheduling on Multi BOOST Environment

Byung Ki Kim, Jeong Gun Lee, Seon Woo Lee, Young Woong Ko

International Conference on Hybrid Information Technology (ICHIT), 2012

Conference: Aug 23, 2012 – Aug 25, 2012

FPGA 장치 기반 Asynchronous MIPS 프로세서 설계

이승준, 이정근, 곽상훈

한국정보과학회/한국정보처리학회 공동 학술 심포지움, 2012

FPGA 기반의 GALS 네트워크-온-칩 아키텍쳐 설계

곽상훈, 김강훈, 이정근

한국정보과학회/한국정보처리학회 공동 학술 심포지움, 2012

Accurate and Energy Efficient ECG Analysis Method for ECG Monitoring System

Min Zeng, Jeong-Gun Lee, Il-Yong Chung, Jeong-A Lee

Journal of the Korean Institute of Communication Sciences, vol. Vol.37C, No.05, 2012

Published: May 30, 2012

A Novel Automated Experimental Approach for the Measurement of On-Chip Speed Variations through Dynamic Partial Reconfiguration

Hasan Baig, Jeong-Gun Lee, Jeong-A Lee

International Conference on Automation and Robotics (ICAR), LNEE Vol.123, pp. 281-290, 2011

Conference: Dec 1, 2011 – Dec 2, 2011

Monitoring and Feedback Tools for Realtime Workloads for Xen Virtual Machine

Byung Ki Kim, Jae Hyeok Jang, Kyung Woo Hur, Jeong Gun Lee, Young Woong Ko

International Conference on IT Convergence and Security (ICITCS), LNEE Vol.120, pp. 151-161, 2011

Low Area and High Speed SHA-1 Implementation

Eun-Gu Jung, Daewan Han, Jeong-Gun Lee

International SoC Design Conference (ISOCC), 2011

Conference: Nov 17, 2011 – Nov 18, 2011

FPGA 장치 기반의 비동기식 FIFO 구조 설계 및 성능 평가

Seung-Joon Lee, Young-Woong Ko, Jeong-Gun Lee

Journal of the Korea Society of Computer and Information, vol. Vol.15, No.10, pp. 1-9, 2011

An On-Node Intelligence based Energy Efficient ECG Monitoring System

Min Zeng, Il-Yong Chung, Jeong-A Lee, Jeong-Gun Lee

International Conference on ICT Convergence (ICTC), 2011

Conference: Sep 28, 2011 – Sep 30, 2011

Energy Efficient File Transfer Mechanism Using Deduplication Scheme

Ho Min Jung, Sung Woon Kang, Jin Kim, Wan Yeon Lee, Jeong-Gun Lee, Young Woong Ko

International Conference on Hybrid Information Technology (ICHIT), LNCS Vol.6935, pp. 421-428, 2011

Conference: Sep 22, 2011 – Sep 24, 2011

Minimizing Scheduling Delay for Multimedia in Xen Hypervisor

Jeong-Gun Lee, Kyung Woo Hur, Young Woong Ko

Communications in Computer and Information Science, Springer, Vol.199, pp. 96-108, 2011

중복제거 TAR 기법을 적용한 백업 시스템

강성운, 정호민, 이정근, 고영웅

한국정보과학회 학술발표논문집, pp. 539-542, 2011

FPGA based Asynchronous FIFO Designs and Its Performance Analysis

Seung-Joon Lee, Sang-Hoon Kwak, Jeong-Gun Lee

International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2011

Conference: Jun 19, 2011 – Jun 22, 2011

파일 유사도를 이용한 에너지 효율적인 파일 전송 기법

정호민, 강성운, 이정근, 고영웅

한국정보과학회 학술발표논문집, pp. 373-376, 2011

472 MHz Throughput Asynchronous FIFO Design On a Virtex-5 FPGA Device

Jeong-Gun Lee, Myeong-Hoon Oh, Deok-Young Lee, Young-Woong Ko

IEICE Electronics Express, 2011

Published: May 10, 2011

데이터 중복 제거 기반의 디스크 아카이브 시스템 설계 및 구현

강성운, 정호민, 고영웅, 이정근

한국정보처리학회 춘계 학술발표논문집, 2011

Xen 가상 머신에서 연성 실시간 스케줄러 구현

허경우, 이정근, 고영웅

한국정보기술학회 ICT 스마트기술 워크숍 및 하계종합학술대회, pp. 256-262, 2011

CRC64해시를 이용한 에너지 효율적인 파일 전송 기법 설계 및 구현

정호민, 강성운, 이정근, 고영웅

한국정보처리학회 춘계 학술발표논문집, 2011

Data Deduplication System for Supporting Multi-Mode

Ho Min Jung, Won Vien Park, Wan Yeon Lee, Jeong Gun Lee, Young Woong Ko

Asian Conference on Intelligent Information and Database Systems (ACIIDS), LNCS Vol.6591, pp. 78-87, 2011

Conference: Apr 20, 2011 – Apr 22, 2011

FPGA 장치 기반의 비동기식 회로설계 기법에 대한 분석

이승준, 고영웅, 이덕영, 이정근

대한전자공학회 하계 학술대회, 2011

Conference: Jun 22, 2011 – Jun 24, 2011

비동기식 회로 설계 기술 동향

오명훈, 이정근, 김성남, 김성운

대한전자공학회 하계 학술대회, 2011

Conference: Jun 22, 2011 – Jun 24, 2011

Power-Delay Product Optimization of Heterogeneous Adder Using Integer Linear Programming

Sang-Hoon Kwak, Jeong-Gun Lee, Jeong-A Lee

Journal of the Korea Society of Computer and Information, vol. Vol.15, No.10, pp. 1-9, 2010

Published: Oct 31, 2010

A Performance/Energy Analysis and Optimization of Multi-Core Architectures with Voltage Scaling Techniques

Jeong-Gun Lee, Wook Shin, Suk-Jin Kim, Eungu Jung

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. Vol.E93-A, No.6, pp. 1215-1225, 2010

Published: Jun 1, 2010

향상된 연산시간, 회로면적, 소비전력의 절충관계를 위한 혼합가산기 기반 CORDIC

Byeong-Seok Lee, Jeong-Gun Lee, Jeong-A Lee

Journal of the Korea Society of Computer and Information, vol. Vol.15, No.2, pp. 9-18, 2010

Published: Feb 28, 2010

저전력 SoC을 위한 동적 주파수 제어 시스템의 FPGA 프로토타입 설계

Eungu Jung, Jeong-Gun Lee

Journal of KISS: Computing Practices and Letters, 2009

Published: Nov 2009

Hybrid adder comprising multiple sub-adders, each of which uses a different carry propagation scheme

Jeong-A Lee, Kiseon Kim, Jeong-Gun Lee, Suk-Jin Kim

European Patent, vol. EP 1 650 647 B1, 2009

Mixed-type Adder Comprising Multiple Sub-adders, Each of Which Has Different Carry Propagation Scheme

Jeong-A Lee, Kiseon Kim, Jeong-Gun Lee, Suk-Jin Kim

US Patent, vol. US 7,562,107 B2, 2009

Exploration of Power-Delay Tradeoffs with Heterogeneous Adders by Integer Linear Programming

Sanghoon Kwak, Jeong-Gun Lee, Eun-Gu Jung, Dongsoo Har, Milos D. Ercegovac, Jeong-A Lee

Journal of Circuits, Systems, and Computers, vol. Vol.18, No.4, pp. 787-800, 2009

Published: Jun 2009 · Online: Nov 21, 2011

Optimal Position Searching for Automated Malware Signature Extraction

Yangseo Choi, Jintae Oh, Jeong-Gun Lee, Jaecheol Ryou

IEEE International Symposium on Consumer Electronics (ISCE), 2009

Conference: May 25, 2009 – May 28, 2009

Intelligent sensor node based a low power ECG monitoring system

Min Zeng, Jeong-Gun Lee, Goang-Seog Choi, Jeong-A Lee

IEICE Electronics Express, vol. Vol.6, No.9, pp. 560-565, 2009

Published: May 10, 2009

An Asymptotic Performance/Energy Analysis and Optimization of Multi-Core Architectures

Jeong-Gun Lee, Eungu Jung, Wook Shin

International Conference on Distributed Computing and Networking (ICDCN), LNCS, 2009

Conference: Jan 3, 2009 – Jan 6, 2009

Performance Evaluation of Code Optimization Strategies for ARM Processors

Kwang-Won Choi, Ju-Teak Sun, Jeong-Gun Lee

KIPS Fall Conference, 2009

안전한 인터넷 뱅킹을 위한 트랜잭션 서명기법에 관한 연구

Hyung-Jin Lim, Jeong-Gun Lee, Moonseong Kim

Journal of Korean Society for Internet Information, pp. 129-135, 2008

Published: Dec 2008

Asymptotic Performance Analysis and Optimization of Resource-Constrained Multi-Core Architectures

Jeong-Gun Lee, Eungu Jung, Dong-Wook Lee

IEEE International Conference on Microelectronics (ICM), 2008

Conference: Dec 14, 2008 – Dec 17, 2008

The Use of Fair Y-Sim for Optimizing Mapping Set Selection in Hardware/Software Co-Design

Olufemi Adeluyi, Eunok Kim, Jeong-Gun Lee, Jeong-A Lee

IEEE International SoC Design Conference (ISOCC), 2008

Conference: Nov 24, 2008 – Nov 25, 2008

고성능/저전력 3D 기하 연산을 위한 오프라인 CORDIC 벡터회전 알고리즘

Eunok Kim, Jeong-Gun Lee, Jeong-A Lee

Journal of KISS: Computing Practices and Letters, vol. Vol.14, No.8, pp. 763-767, 2008

Published: Nov 2008

Design of Heterogeneous Adders Based on Power-delay Tradeoffs

Sanghoon Kwak, Dongsoo Har, Jeong-Gun Lee, Jeong-A Lee

IEEE International Symposium on Embedded Computing (SEC), 2008

Conference: Oct 6, 2008 – Oct 8, 2008

Embedding High-Performance Synchronous Routers to Asynchronous Network on Chip

Jeong-Gun Lee, Eungu Jung

International Conference on Computer Design (CDES), 2008

CORDIC Based Off-line Vector Rotation Algorithm for High-Performance and Low-Power 3D Geometry Operations

Eunok Kim, Jeong-Gun Lee, Jeong-A Lee

Korea Computer Congress (KCC), 2008

Optimum Core Partitioning for High-Performance Multi-Core Processor Design

Jeong-Gun Lee

KISS Symposium, 2008

μC/OS-II 운영체제환경을 고려한 SDL 명세로부터의 내장형 C 코드 자동 생성

Sang-Hoon Kwak, Jeong-Gun Lee

Journal of the Korea Society of Computer and Information, pp. 46-55, 2008

Published: May 2008

정수 선형 프로그래밍을 이용한 혼합 가산기 구조의 최적 설계

Deok-Young Lee, Jeong-Gun Lee, Jeong-A Lee, Sang-Min Rhee

Journal of KISS: Computer Systems and Theory, vol. Vol.34, No.7/8, pp. 327-336, 2007

Mixed-type Adder Comprising Multiple Sub-adders, Each of Which Has Different Carry Propagation Scheme

Jeong-A Lee, Kiseon Kim, Jeong-Gun Lee, and Suk-Jin Kim

KR Patent No. 10-0714316 (registered 2007-04-26), 2007

Asynchronous Layered Interface of Multimedia SoCs for Multiple Outstanding Transactions

Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Son Jhang, Jeong-A Lee, Dong-Soo Har

The Journal of VLSI Signal Processing, vol. Vol.46, No.2-3, pp. 133-151, 2007

Published: Mar 2007 · Online: Jan 23, 2007

Data Transmitting Circuit and Method Based On Differential Value Data Encoding

Eun-Gu Jung, Jeong-Gun Lee, Dong-Soo Har

US Patent, vol. US 7,170,431, 2007

A Design Method for Heterogeneous Adders

Jeong-Gun Lee, Jeong-A Lee, Byeong-Seok Lee, Milos D. Ercegovac

International Conference on Embedded Software and Systems (ICESS), LNCS, 2007

Conference: May 14, 2007 – May 16, 2007

Implications of Rent's Rule for NoC Design and Its Fault-Tolerance

Dan Greenfield, Arnab Banerjee, Jeong-Gun Lee, Simon Moore

IEEE Symposium on Networks-on-Chip (NoCS), 2007

Conference: May 7, 2007 – May 9, 2007

Better Area-Time Tradeoffs in an Expanded Design Space of Adder Architecture by Parameterizing Bit-width of Various Carry Propagated Sub-adder-blocks

Jeong-Gun Lee, Jeong-A Lee, Deok-Young Lee

IEEE International Workshop on System on Chip (IWSOC), 2006

Conference: Dec 27, 2006 – Dec 29, 2006

Extending the Design Space of Adder Architectures and Its Optimization Using Integer Linear Programming

Deok-Young Lee, Jeong-A Lee, Jeong-Gun Lee, Sang-Min Rhee

KIPS Transactions: Technology Education, vol. Vol.1, No.1, pp. 64-70, 2006

Data Transmitting Circuit and Method Based on Differential Value Data Encoding

Eun-Gu Jung, Jeong-Gun Lee, Dong-Soo Har

KR Patent No. 10-0574767 (registered 2006-04-21), 2006

Towards a Communication-Centric Design Methodology

A. Banerjee, R. Francis, J. Lee, J. May, S.W. Moore, R. D. Mullins

Workshop on Future Interconnects and Network on Chip, 2006

Asynchronous Multiple-Issue On-Chip Bus with In-Order/Out-of-Order Completion

Eun-Gu Jung, Jeong-Gun Lee, Sang-Hoon Kwak, Kyoung-Son Jhang, Jeong-A Lee, Dong-Soo Har

IEICE Transactions on Electronics, vol. Vol.E88-C, No.12, pp. 2395-2399, 2005

Published: Dec 1, 2005

Selecting a Timing Regime for On-Chip Networks

Robert Mullins, Jeong-Gun Lee, Simon Moore

UK Asynchronous Circuit Forum, 2005

Differential Value Encoding for Delay Insensitive Handshake

Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Sun Jhang, Dong-Soo Har

IEICE Transactions on Information and Systems, vol. Vol.E88-D, No.7, pp. 1437-1444, 2005

Published: Jul 1, 2005

Implementation of Asynchronous Reorder Buffer for Asynchronous On-Chip Bus

Eun-Gu Jung, Jeong-Gun Lee, Hamza Fraz, Kyoung-Son Jhang, Jeong-A Lee, Dong-Soo Har

International Symposium on Signals, Circuits and Systems (ISSCS), 2005

Conference: Jul 14, 2005 – Jul 15, 2005

Low Latency Four-flop Synchronizer with the Handshake Interface

Suk-Jin Kim, Jeong-Gun Lee, Kiseon Kim

IEICE Transactions on Information and Systems, vol. Vol.E88-D, No.7, pp. 1460-1463, 2005

Published: Jul 1, 2005

Design of a Mutated Adder and Its Optimization Using ILP Formulation

Jeong-Gun Lee, Jeong-A Lee, Suk-Jin Kim, Kiseon Kim

IEICE Transactions on Information and Systems, vol. Vol.E88-D, No.7, pp. 1506-1508, 2005

Published: Jul 1, 2005

Reconfigurable Co-synthesis System Architecture

Ji-han Park, Sang-Hoon Kwak, Jeong-Gun Lee, Jeong-A Lee, Dong-soo Har

International Technical Conference of Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 445-446, 2005

A Low Latency Asynchronous FIFO Combining a Wave Pipeline with Handshake Scheme

Jeong-Gun Lee, Suk-Jin Kim, Jeong-A Lee, Kiseon Kim

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. E88-A(4), pp. 1031-1037, 2005

Published: Apr 1, 2005

Instruction Level Redundant Number Computations for Fast Data Intensive Processing in Asynchronous Processors

Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

Journal of Systems Architecture, vol. Vol.51/3, pp. 151-164, 2005

Published: Mar 2005

Procedural Constraints in the Extended RBAC and the Coloured Petri Net Modeling

Wook Shin, Jeong-Gun Lee, Hong Kook Kim, Kouichi Sakurai

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. Vol.E88-A, No.1, pp. 327-330, 2005

Published: Jan 1, 2005

Issues of Asynchronous Distributed Control and Variable Delay Computation for High Performance System Design

Jeong-Gun Lee

GIST/University of Osaka Joint Workshop, 2005

High Performance Asynchronous On-Chip Bus with Multiple Issue and Out-of-Order/In-Order Completion

Eun-Gu Jung, Jeong-Gun Lee, Sang-Hoon Kwak, Kyoung-Sun Jhang, Jeong-A Lee, Dong-Soo Har

IEEE/ACM Great Lakes Symposium on VLSI (GLVLSI), 2005

Conference: Apr 17, 2005 – Apr 19, 2005

A Parallel Flop Synchronizer and the Handshake Interface for Bridging Asynchronous Domains

Suk-Jin Kim, Jeong-Gun Lee, Kiseon Kim

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. Vol.E87-A, No.12, pp. 3166-3173, 2004

Published: Dec 1, 2004

Issues of Asynchronous Distributed Control and Variable Delay Computation for High Performance System Design

Jeong-Gun Lee

PhD Dissertation, Gwangju Institute of Science and Technology, 2004

Expanding Design Space of Adder Architecture for Better Time-Area Trade-offs

Jeong-Gun Lee, Jeong-A Lee, Suk-Jin Kim, Kiseon Kim

International System On Chip Conference (ISOCC), 2004

Efficient Buffer Allocation for Asynchronous Linear Pipelines by Design Space Localization

Jeong-Gun Lee, Euiseok Kim, Jeong-A Lee, Eunok Paek

Asia-Pacific Computer Systems Architecture Conference (ACSAC), LNCS Vol.3189, pp. 582-595, 2004

Conference: Sep 7, 2004 – Sep 9, 2004

Design of a Mutated Adder and its Optimization Using ILP Formulation

Jeong-Gun Lee, Jeong-A Lee, Suk-Jin Kim, Seong-Yong Ahn, Kiseon Kim

EUROMICRO/DSD Work in Progress Session, 2004

A parallel flop synchronizer for asynchronous domains

Suk-Jin Kim, Jeong-Gun Lee, Kiseon Kim

IEEE Asia-Pacific Conference on Advanced System Integrated Circuits (AP-ASIC), 2004

Two-Phase 1-of-N Delay Insensitive Handshake Protocol using Differential Value Encoding for SoC

Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Sun Jhang, Dong-Soo Har

International Scientific-Practical Conference on Communication (ISPC-COMM), 2004

Handshake-Wave Combined Approach with Runtime Reconfiguration for Designing a Low Latency Asynchronous FIFO

Jeong-Gun Lee, Suk-Jin Kim, Jeong-A Lee, Euiseok Kim, Kiseon Kim

IEEE Asia-Pacific Conference on Advanced System Integrated Circuits (AP-ASIC), 2004

Low Latency Asynchronous FIFO Design of Adopting Wave Pipelining for SoC Interconnection

Jeong-Gun Lee, Suk-Jin Kim, Jeong-A Lee, Euiseok Kim, Kiseon Kim

CNU IDEC SoC Workshop, pp. 49-53, 2004

Dynamic Clock Frequency Scaling in GALS on-chip Network Systems

Suk-Jin Kim, Jeong-Gun Lee, Kiseon Kim

International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), 2004

Differential Value Encoding for Two-Phase 1-of-N Delay Insensitive Handshake Protocol in GALS Systems

Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Sun Jhang, Dong-Soo Har

IEEE International Midwest Symposium on Circuits and Systems (MWSCAS), 2004

Conference: Jul 25, 2004 – Jul 28, 2004

Two-Phase 1-of-N Delay Insensitive Handshake Protocol using Differential Value Encoding for System-on-Chip

Eun-Gu Jung, Jeong-Gun Lee, Kyoung-Sun Jhang, Dong-Soo Har

Korea Communication Society Fall Conference, 2004

A Low Latency Asynchronous FIFO Combining a Wave Pipeline with Handshake Scheme

Jeong-Gun Lee, Suk-Jin Kim, Jeong-A Lee

GIST/Tokyo University Joint Workshop on Asynchronous System Design, 2004

Asynchronous Controller Generation Method

Dong-Ik Lee, Euiseok Kim, Jeong-Gun Lee

US Patent, vol. US 6,594,815, 2003

Implementation of a Generalized Synchronous Variable Computation Time Arithmetic Unit with a Single-Dual-Single Wrapper

Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya

International Technical Conference on Circuits/Systems, Computers and Communications (ITC-CSCC), pp. 1075-1078, 2003

Synthesis of a Single-Dual-Single Wrapper for a Generalized Synchronous Variable Computation Time Arithmetic Unit

Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya

International Workshop on Logic and Synthesis (IWLS), pp. 29-35, 2003

Conference: May 28, 2003 – May 30, 2003

Distributed Synchronous Control Units for Dataflow Graphs under Allocation of Telescopic Arithmetic Units

Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya

IEEE/ACM Design, Automation and Test in Europe (DATE), pp. 276-281, 2003

Conference: Mar 3, 2003 – Mar 7, 2003

Performance Optimization of Synchronous Control Units for Datapaths with Variable Delay Arithmetic Units

Euiseok Kim, Hiroshi Saito, Jeong-Gun Lee, Dong-Ik Lee, Hiroshi Nakamura, Takashi Nanya

IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 261-266, 2003

Conference: Jan 21, 2003 – Jan 24, 2003

Two-Phase 1-of-N Data Encoding for GALS

Eun-Gu Jung, Jeong-Gun Lee, Dong-Ik Lee

Korea SoC Design Conference, 2003

Asynchronous Control Circuit Generation Method

Dong-Ik Lee, Euiseok Kim and Jeong-Gun Lee

KR Patent No. 10-0345009 (registered 2002-07-04), 2002

A Simulator for Performance Evaluation of Asynchronous Systems

Sang-Ik Choi, Jeong-Gun Lee, Dong-Ik Lee, Seok-Hwan Yoon

International Conference on VLSI (VLSI'02), pp. 66-71, 2002

SLEDS: A System-Level Event-Driven Simulator for Asynchronous Microprocessors

Sang-Ik Choi, Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

Journal of KISS: Computer Systems and Theory, vol. Vol.29, No.1, pp. 42-55, 2002

Implementation of Distributed Synchronous Control Units for Maximizing Utilization Ratio of Variable Computation Time Arithmetic

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

Korea SoC Design Conference, 2002

Buffer Allocation Optimization for Asynchronous Linear Pipelines using Performance Evaluation and Simulation Annealing

Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

Korea SoC Design Conference, 2002

Deriving an Optimized Synchronous Control Unit for a Variable Delay Datapath

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

IDEC Summer Conference, pp. 143-146, 2002

Synthesis of Asynchronous Circuits from C Language Using Syntax Directed Translation

Sang-Hoon Kwak, Jeong-Gun Lee, Dong-Ik Lee

IEEK Summer Conference, pp. 353-356, 2002

Design of a Synchronous Control Unit for a Datapath with Variable Delay Arithmetic Units

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

IEEK Summer Conference, pp. 321-324, 2002

Asynchronous Linear Pipeline Dynamics and Its Application to Efficient Buffer Allocation Algorithm

Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

IEEK Summer Conference, pp. 109-112, 2002

Dynamic Clock Frequency Scaling in Globally Asynchronous and Locally Synchronous Systems

Suk-Jin Kim, Jeong-Gun Lee, Dong-Ik Lee

Asia-Pacific System on a Chip Conference (APSOC), pp. 114-119, 2002

Automatic STG Derivation with Consideration of Special Properties of STG Based Asynchronous Logic Synthesis

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

Journal of KIPS, vol. Vol.9-A, No.3, pp. 351-352, 2001

Published: Sep 1, 2002

Automatic Process-Oriented Asynchronous Control Unit Generation from Control Data Flow Graphs

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. Vol.E84-A, No.8, pp. 2014-2028, 2001

Published: Aug 1, 2001

Deriving a Distributed Asynchronous Control Unit through Automatic Derivation of Asynchronous Finite State Machines Based on the Process-Oriented Method

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

Journal of KISS: Computer Systems and Theory, vol. Vol.28, No.7, pp. 356-372, 2001

Test Generation for SI Circuits with Undetectable Faults from STG

Eunjung Oh, Jeong-Gun Lee, Ho-Yong Choi, Dong-Ik Lee

IEICE Transactions on Fundamentals of Electronics, Communications and Computer Sciences, vol. Vol.E84-A, No.6, pp. 1506-1514, 2001

Published: Jun 1, 2001

Building a Distributed Asynchronous Control Unit Through Automatic Derivation of Hierarchically Decomposed AFSMs from a CDFG

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

IEEE Conference on Advanced Research in VLSI (ARVLSI), pp. 2-15, 2001

Imprecise Data Computation for High Performance Asynchronous Processors

Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

IEEE/ACM Asia and South Pacific Design Automation Conference (ASP-DAC), pp. 261-266, 2001

Conference: Jan 30, 2001 – Feb 2, 2001

Pragmatic Reachability Analysis of Bounded Petri Nets Based on Unfoldings

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

Journal of KISS: Computer Systems and Theory, vol. Vol.27, No.6, pp. 599-607, 2000

Automatic Distributed Asynchronous Control Circuit Generation From Data Flow Graph for Asynchronous High-Level Synthesis

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

IEEE International Symposium on Circuits and Systems (ISCAS), pp. II-49-II-52, 2000

Conference: May 28, 2000 – May 31, 2000

Reachability Characterization for Bounded Petri Nets Based on Unfoldings

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

Software Engineering Review, pp. 67-75, 2000

Automatic Process-Oriented Control Circuit Generation For Asynchronous High-Level Synthesis

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

IEEE International Symposium on Advanced Research in Asynchronous Circuits and Systems (ASYNC), pp. 104-113, 2000

Imprecise Data Computation for High Performance Asynchronous Processors

Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

KISS Computer System Group Fall Conference, pp. 88-93, 2000

Back Carry Collapsing Adder Design for High-Performance Asynchronous System

Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

IDEC Conference, pp. 95-98, 2000

Automatic Control Circuit Generation from Data Flow Graph for Asynchronous High-Level Synthesis

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

IDEC Conference, pp. 61-64, 2000

Pragmatic Reachability Analysis of Bounded Petri Nets on Unfoldings

Euiseok Kim, Jeong-Gun Lee, Dong-Ik Lee

Formal Method Workshop, pp. 165-171, 2000

Testing for Speed-Independent Asynchronous Circuits Using the Self-Checking Property

Eunjung Oh, Jeong-Gun Lee, Dong-Ik Lee, Ho-Yong Choi

IEEK Fall Conference, pp. 384-387, 1999

High Level Simulation of Asynchronous Circuit on Parallel Processing Environment

Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

IEEK CAD & VLSI Design Conference, pp. 72-77, 1999

Asynchronous Circuit Initialization Using BDD

Soo-Hyun Kim, Jeong-Gun Lee, Dong-Ik Lee

IEEK Summer Conference, pp. 887-890, 1998

A Study on Basic Gate Implementation of Asynchronous Circuits Using Binary Decision Diagrams

Jeong-Gun Lee

Master Thesis, Gwangju Institute of Science and Technology, 1997

Basic Gate Level Logic Synthesis of Speed-Independent Circuit using Binary Decision Diagram

Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

IEEK Fall Conference, pp. 1136-1139, 1997

Implementability Checking and Basic Gate Synthesis of Speed-Independent Circuits Using BDD

Jeong-Gun Lee, Euiseok Kim, Dong-Ik Lee

Formal Method Workshop, pp. 44-54, 1997